1. Field of the Invention
The present embodiments relate to wafer processing apparatus, and more particularly, apparatus, methods, and computer programs for edge exclusion control with adjustable plasma exclusion zone ring.
2. Description of the Related Art
The manufacturing of integrated circuits includes immersing silicon substrates (wafers) containing regions of doped silicon in chemically-reactive plasmas, where the submicron device features (e.g., transistors, capacitors, etc.) are etched onto the surface. Once the first layer is manufactured, several insulating (dielectric) layers are built on top of the first layer, where holes, also referred to as vias, and trenches are etched into the material for placement of the conducting interconnectors. The chemically-reactive plasmas are created in a plasma chamber. This is an illustration of use of etching. Etching may be used to clean the substrate or remove residues from a surface of the substrate.
As an amount of etching changes, hardware of the plasma chamber is changed. Such change in hardware results in an increase in cost and effort used to etch a substrate.
It is in this context that embodiments of the invention arise.